At the end of the third quarter of 2016, the DropA5D2 extends our CoM portfolio. A fully-flegded Cortex-A5 core incorporating NEON, AES and a TRNG as well as 256 MB LPDDR1 fit on a size of 45 mm x 26 mm.
As boot media, a serial flash and a SD card socket are mounted on the board. Access to the peripherals is provided by the 100pin FX8 connector.
Low energy consumption is always our main focus: Thus the consumption in standby by full preservation of the memory content is about 1 mA with a wake-up time below 1 ms.
- ARM Cortex-A5 Kern, ARMv7-A, NEON, Jazelle
- AES, SHA, TRNG
- 500 MHz CPU clock, 166 MHz bus clock
- 256 MB LPDDR1
- 32 kB L1 data cache, 32 kB L1 instruction cache
- 128 kB L2 cache
- 128 kB scrambled SRAM
- 2 MB serial flash
- 3.3 V power supply
- 100pin FX8 connector
- 45 mm x 26 mm size
- 1x USB host, 1x USB host/device
- 1x ethernet 10/100 Mbit
- max. 72 PIO pins
- max. 5 UART
- max. 4 Flexcom (UART, SPI or TWI)
- 3,3 mW in standby mode (1 mA @ 3.3V)
- < 100 μs wake-up time